03/19/2013
Tabula Sets New Industry Benchmarks with a Suite of 100G Programmable Solutions Based on the Company’s ABAX2 P-Series of 3PLDs
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03/19/2013
Tabula Releases Groundbreaking EDA Technologies in Support of its Suite of High- Performance Packet Processing Solutions
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Top 3 'Next Big Thing' Start-ups of 2012
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Carrier Conference 2013
June 12-13, 2013
Hyatt Regency Hotel, Santa Clara, CA
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Tabula's Four Core Technology Components

3PLD Devices


The ABAX2P1 3PLD chip is a 12‐fold Spacetime device that delivers unique RAM and logic fabric capabilities alongside tailored, hard IP blocks.

Stylus Compiler


The compiler integrates cutting‐edge technologies: sequential timing, router-aware placement, & automatic co‐optimization of performance.

3D Architecture


The Spacetime 3D architecture employs time, as a third dimension, rapidly reprogramming every resource on the chip.

Intel PROCESS


Intel's 3D Tri‐Gate transistors, the most advanced in the world, provide unmatched speed at low operating voltage for reduced power.

   

 
 

4x100G switch reference design kit
 
12x10G‐to‐100G bridge reference design kit
 
2nd‐generation Ternary Search Engine (TSE2) reference design kit


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